- We will send in 10–14 business days.
/images/books/13599266/9789333223430.jpg)
- Author: D A Godse
- Publisher: Amazon Digital Services LLC - KDP Print US
- ISBN-10: 9333223436
- ISBN-13: 9789333223430
- Format: 18.9 x 24.6 x 1.1 cm, minkšti viršeliai
- Language: English
- SAVE -10% with code: EXTRA
Reviews
Description
The book is written for an undergraduate course on Hardware Description Languages. It provides comprehensive coverage of the VHDL (VHSIC-HDL, Very High Speed Integrated Circuit Hardware Description Language). It also introduces Verilog HDL. The book uses plain and lucid language to explain each topic. A large number of programming examples is the feature of this book.The book explains the structure of VHDL module, operators, data objects, and data types used in VHDL. It describes various modeling styles - Behavioral Modeling, Data Flow Modeling, Structural Modeling, Switch-Level Modeling, and Mixed-Type Descriptions, with important concepts involved in them. It also introduces the structure of the Verilog HDL module, operators, data types, and compares VHDL and Verilog HDL.
EXTRA 10 % discount with code: EXTRA
The promotion ends in 21d.20:17:01
The discount code is valid when purchasing from 10 €. Discounts do not stack.
- Author: D A Godse
- Publisher: Amazon Digital Services LLC - KDP Print US
- ISBN-10: 9333223436
- ISBN-13: 9789333223430
- Format: 18.9 x 24.6 x 1.1 cm, minkšti viršeliai
- Language: English English
The book is written for an undergraduate course on Hardware Description Languages. It provides comprehensive coverage of the VHDL (VHSIC-HDL, Very High Speed Integrated Circuit Hardware Description Language). It also introduces Verilog HDL. The book uses plain and lucid language to explain each topic. A large number of programming examples is the feature of this book.The book explains the structure of VHDL module, operators, data objects, and data types used in VHDL. It describes various modeling styles - Behavioral Modeling, Data Flow Modeling, Structural Modeling, Switch-Level Modeling, and Mixed-Type Descriptions, with important concepts involved in them. It also introduces the structure of the Verilog HDL module, operators, data types, and compares VHDL and Verilog HDL.
Reviews