Reviews
Description
1. General overview and context
2. Global state-of-the-art overview
3. Energy consumption breakdown for embedded platform targets
4. High level embedded arch and compiler requirements
5. Overall architecture exploration framework
6. Clustered loop buffer and data cluster organisation
7. Multi-threading in uni-threaded processors
8. Indirectly addressed arrays and dynamic data structure handling on scratchpad memories
9. Asymmetric foreground memory organisation
10. Exploiting word-width information in the processor datapath
11. Advanced strength reduction in shift-add based operations
12. Bioimaging application demonstrator
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1. General overview and context
2. Global state-of-the-art overview
3. Energy consumption breakdown for embedded platform targets
4. High level embedded arch and compiler requirements
5. Overall architecture exploration framework
6. Clustered loop buffer and data cluster organisation
7. Multi-threading in uni-threaded processors
8. Indirectly addressed arrays and dynamic data structure handling on scratchpad memories
9. Asymmetric foreground memory organisation
10. Exploiting word-width information in the processor datapath
11. Advanced strength reduction in shift-add based operations
12. Bioimaging application demonstrator
Reviews