223,28 €
248,09 €
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Testing of Interposer-Based 2.5d Integrated Circuits
Testing of Interposer-Based 2.5d Integrated Circuits
223,28
248,09 €
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This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have a…
248.09
  • Publisher:
  • ISBN-10: 3319547135
  • ISBN-13: 9783319547138
  • Format: 15.6 x 23.4 x 1.3 cm, kieti viršeliai
  • Language: English
  • SAVE -10% with code: EXTRA

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This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.

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  • Author: Ran Wang
  • Publisher:
  • ISBN-10: 3319547135
  • ISBN-13: 9783319547138
  • Format: 15.6 x 23.4 x 1.3 cm, kieti viršeliai
  • Language: English English

This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.

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