- We will send in 10–14 business days.
/images/books/13004022/9783031183966.jpg)
- Author: Pallavi Srivastava
- Publisher: Springer
- ISBN-10: 3031183967
- ISBN-13: 9783031183966
- Format: 15.6 x 23.4 x 1 cm, hardcover
- Language: English
- SAVE -10% with code: EXTRA
Reviews
Description
This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.
EXTRA 10 % discount with code: EXTRA
The promotion ends in 20d.17:04:27
The discount code is valid when purchasing from 10 €. Discounts do not stack.
- Author: Pallavi Srivastava
- Publisher: Springer
- ISBN-10: 3031183967
- ISBN-13: 9783031183966
- Format: 15.6 x 23.4 x 1 cm, hardcover
- Language: English English
This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.
Reviews